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  #1  
July 26th, 2016, 04:06 PM
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ACA VTU Syllabus

Somebody of you please get the syllabus of Advanced Computer Architectures issued by Visvesvaraya Technological University?
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  #2  
July 26th, 2016, 04:56 PM
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Join Date: Mar 2013
Re: ACA VTU Syllabus

No problem I will get the syllabus of Advanced Computer Architectures issued by Visvesvaraya Technological University.

Here is the syllabus
Part A
Unit-1
Fundamentals Of Computer Design
Introduction; Classes of computers;Defining computer architecture; Trends in Technology, power in Integrated Circuits and cost; Dependability; Measuring, reporting and summarizing Performance; Quantitative Principles of computer design.

Unit-2
Pipelining
Introduction; Pipeline hazards; Implementation of pipeline; What makes pipelining hard to implement?

Unit-3
Instruction –Level Parallelism – 1
ILP: Concepts and challenges; Basic Compiler Techniques for exposing ILP; Reducing Branch costs with prediction; Overcoming Data hazards with Dynamic scheduling; Hardware-based speculation.

Unit-4
Instruction –Level Parallelism – 2
Exploiting ILP using multiple issue and static scheduling; Exploiting ILP using dynamic scheduling, multiple issue and speculation; Advanced Techniques for instruction delivery and Speculation; The Intel Pentium 4 as example.

Part B
Unit-5
Multiprocessors and Thread –Level Parallelism
Introduction; Symmetric shared-memory architectures; Performance of symmetric shared–memory multiprocessors; Distributed shared memory and directory-based coherence; Basics of synchronization; Models of Memory Consistency

Unit-6
Review of Memory Hierarchy
Introduction; Cache performance; Cache Optimizations, Virtual memory

Unit-7
Memory Hierarchy design
Introduction; Advanced optimizations of Cache performance; Memory technology and optimizations; Protection: Virtual memory and virtual machines.

Unit-8
Hardware and Software for VLIW and EPIC
Introduction: Exploiting Instruction-Level Parallelism Statically; Detecting and Enhancing Loop-Level Parallelism; Scheduling and Structuring Code for Parallelism; Hardware Support for Exposing Parallelism: Predicated Instructions; Hardware Support for Compiler Speculation; The Intel IA-64 Architecture and Itanium Processor; Conclusions.

Address:-
Visvesvaraya Technological University
Jnana Sangama, VTU Main Road, Machhe, Belagavi, Karnataka 590018

Phone:-
0831 249 8196


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