#1
April 21st, 2015, 11:47 AM
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IIIT Vlab
My name is Vikas Ranka. I am a student of 12th Maths. I want to know about IIIT (Indian institute of information technology) virtual lab because it is my internal assignment. So please provide me information related to this and how it works?
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#2
March 2nd, 2017, 11:26 AM
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Re: IIIT Vlab
Give list of all Virtual Labs of IIIT Hyderabad? What information provided by Virtual Labs of IIIT Hyderabad, can anybody tell me about it?
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#3
March 2nd, 2017, 11:27 AM
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Re: IIIT Vlab
There are several Virtual Labs at IIIT Hyderabad. Virtual Labs are following: Problem Solving Lab Soil Mechanics Lab Analog CMOS VLSI Circuit Design Lab VLSI Lab Structural dynamics Colloid and Surface Chemistry Lab Molecular Absorption Spectroscopy Lab Circular Dichroism Spectroscopy Lab Physical Chemistry (IIITH) Lab Electromagnetic Theory Lab Computer Programming Lab Databases Lab Digital Logic Design Lab Speech Signal Processing Lab Computer Graphics Lab Computational Linguistics Lab Natural Language Processing Lab Molecular Interactions Lab Computer Organization Lab Image Processing Lab Data Structures Lab Cryptography Lab Molecular Fluorescence Spectroscopy Lab Quantum Chemistry Lab Artificial Neural Networks Lab Pattern Recognition Lab Basic Structural Analysis Lab Information provided by these Virtual Labs Problem Solving Lab Numerical Representation More on Numbers Recursion Permutation Sequences Beauty of Numbers Advanced Arithmatic Searching and Sorting Factorials String Operations Soil Mechanics Lab Water Content Experiment Unit Weight Experiment Attenberg Limits Experiment Compaction Test Experiment Consolidation Test Experiment Triaxial Test Experiment Specific Gravity Experiment Direct Shear Test Experiment Permeability Experiment Grain Size Distribution Experiment Structural Analysis lab Single Span Beams Experiment Column Analysis Experiment Plates Experiment Arches Experiment Trusses Experiment Plastic Hinge Experiment Continuous Beams Experiment Rijid Joints Experiment Retaining Walls Experiment Portal Frames Experiment Analog CMOS VLSI Circuit Design Lab Design and characterization of common source amplifier with Resistive load : Transfer Characteristics (Vin v/s Vout) Frequency Response (Vin v/s Frequency) Design and characterization of common source amplifier with Diode connected load : Transfer Characteristics (Vin v/s Vout) Frequency Response (Vin v/s Frequency) Design and characterization of common source amplifier with Current source load : Transfer Characteristics (Vin v/s Vout) Frequency Response (Vin v/s Frequency) Design and characterization of common gate amplifier : Transfer Characteristics (Vin v/s Vout) Frequency Response (Vin v/s Frequency) Design and characterization of differential amplifier : Transfer Characteristics (Vin v/s Vout) Frequency Response (Vin v/s Frequency) Design and characterization of differential to single-ended circuit : Transfer Characteristics (Vin v/s Vout) Frequency Response (Vin v/s Frequency) Design and characterization of basic current mirror Design and characterization of cascode current mirror Design and characterization of voltage mode buffer : Transfer Characteristics (Vin v/s Vout) Frequency Response (Vin v/s Frequency) Pattern Recognition Lab Feature Representation Generation of Random Variables MLE: Learning the classifier from data Data Clustering: K-Means, MST-based Mean and Covariance Bayesian Classification Linear Perceptron Learning Very Large Scale Integration Lab Schematic Design Of Transistor Level NAND & NOR Gate. Schematic Design Of Pass Transistor Logic & Multiplexer. Schematic Design Of D-Latch and D-Flip Flop. Spice Code Platform. Design Of Digital Circuits Using Verilog. Layout Design. Schematic Design Of Transistor Level XOR & XNOR Gate. Design Of D-Flip Flop Using Verilog. Delay Estimation In Chain Of Inverters. Schematic Design Of Transistor Level Inverter Contacts Jayanthi Sivaswamy Professor Department of Computer Science & Engineering IIIT HYDERABAD Ph: +914066531000 Ext:1134 Email: jsivaswamy@iiith.ac.in |
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