Can you please give me the past year question papers of Sathyabama University-B.E in EEE-5th Sem Computer Aided Design Exam?

As you want to get the past year question papers of Sathyabama University-B.E in EEE-5th Sem Computer Aided Design Exam so here is the information of the same for you:

Some content of the file has been given here:

1. Write and describe the Matlab function for solving differential
equations.
2. What are the relational and logical operations you can perform by
matlab?
3. Describe the different methods of computing matrix exponential.
4. Write the Matlab program to find the transmission parameters of
a two port network.
5. Differentiate the open loop and closed loop gains in a control
system.
6. Define Biasing.
7. Write the different set of operators in VHDL.
8. Classify the basic language elements in VHDL.
9. What is meant by overloading?
10. Give some examples for the attributes in VHDL conversion.
PART – B (5 x 12 = 60)
Answer All the Questions
11. Explain concept of Array. What are the different array
operations that are used in Matlab representation and discuss
them in detail.
(or)
12. (a) List major examples in the MATLAB Complier
documentation and explain.
(b) Explain the basic features of MATLAB compiler.
13. (a) Obtain the relation for H parameters in terms of Z and Y
parameters and write the MATLAB commands to get Y
parameters of a two port network.
(b) Explain the DC circuit analysis in MATLAB and explain the
control statements.
(or)
14. Write a MATLAB program for the circuit shown in fig.1 to
determine the voltages at node 2 and 3, if Vin = 10 volts.
15. Write the MATLAB sequential commands to find the gain and
phase margins of a closed loop control system having second
order transfer function, H(z).
H(z) = (z-1)/ (z2 – 1.85z + 0.9)
(or)
16. Describe the syntax for the creation of a discrete – time model in
MATLAB for an LTI system having the following transfer
function.
17. (a) Discuss in detail the concept of behavioral modeling of a
system using VHDL.
(b) Describe the different sets of data types of VHDL.
(or)
18. (a) Explain the concept of data flow modeling with different
types.
(b) Differentiate data 1 flow modeling and structural modeling
with examples.
19. (a) Write short technical notes on sub program overloading.
(b) Give some examples for attributes in VHDL and explain in
brief.
(or)
20. (a) Differentiate subprogram overloading and operator
overloading with examples.
(b) Explain the different operations on packages on libraries in
VHDL.






For more detailed information I am uploading PDF files which are free to download:


Contact Details:
Sathyabama University
Rajiv Gandhi Road,
Jeppiaar Nagar,
Sholinganallur,
Chennai,
Tamil Nadu 600119 ‎
044 2450 3150
India

Map Location:

Attached Files

Sathyabama University-B.E in EEE-5th Sem Computer Aided Design Exam.pdf (132.6 KB, 87 views)