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  #1  
February 20th, 2016, 05:21 PM
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AMBA AHB Bus Protocol

Sir I want to get details about the ARM Advanced Microcontroller Bus Architecture (AMBA) so can you tell me the same
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  #2  
February 20th, 2016, 05:36 PM
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Join Date: Mar 2012
Re: AMBA AHB Bus Protocol

The ARM Advanced Microcontroller Bus Architecture (AMBA) is an open-standard, on-chip interconnect specification for the connection and management of functional blocks in system-on-a-chip (SoC) designs


AIM of the AMBA specification is to:

Be technology independent, to allow reuse of ip cores, peripheral and system
Macrocells across diverse ic processes,

Encourage modular system design to improve processor independence, and the
Development of reusable peripheral and system ip libraries

Minimize silicon infrastructure
Facilitate right-first-time development of embedded microcontroller products with one
Or more cpus, gpus or signal processors,while supporting high performance and low power on- Chip communication.


Principles for the designing

An important aspect of a SoC is not only which components or blocks it houses, but also how they interconnect. AMBA is a solution for the blocks to interface with each other.



AMBA ADVANCED HIGH-SPEED BUS
2nd-generation AMBA system bus
Synchronous, nonmultiplexed bus
Separate read, data buses
Multimaster, arbitrated bus
32-, 64-, 128-, 256-bit data paths
32-bit address bus
Pipelined, split transactions
Supports bursts (4-, 8-, 16-beat)
Non-tristate, multiplexer implementation


AMBA ADVANCED SYSTEM BUS
1st-generation AMBA system bus
Synchronous, nonmultiplexed bus
Multimaster, arbitrated bus
32-bit data bus (can be byte, if word)
32-bit address bus
Pipelined transactions
Supports bursts (4-, 8-, 16-beat)


AMBA ADVANCED PERIPHERAL BUS
Peripheral bus for low-speed devices
Bridged to system bus (ASB, AHB)
Synchronous, nonmultiplexed bus
Single master (bridge)
8-, 16-, 32-bit data bus
32-bit address bus
Nonpipelined
2-cycle transfer, no bursts
Static, zero power when not in use


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