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February 24th, 2017, 03:37 PM
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| Re: NMEICT IIT Kgp
National Mission on Education through ICT (MHRD, Govt. of India), IIT Kharagpur conducted the Two-Week ISTE STTP On CMOS, Mixed Signal And Radio Frequency VLSI Design from 30th January, 2017 to 4th February, 2017. Two-Week ISTE STTP On CMOS, Mixed Signal And Radio Frequency VLSI Design Design, analysis and implementation of CMOS Mixed Signal and RFIC are attractive topics both in academia and Industry. CMOS RFIC design is a challenging and critical engineering task particularly in the arena of deep sub-micron technology. There is a strong demand of manpower having thorough knowledge and hands on experiences in VLSI design using state of the art EDA tools. The course will focus on those issues along with case studies. Course domain: Electronics Engineering/Electrical Engineering/Computer Science and Engineering Expectation from the participants: It is assumed that before taking the courses, the participants are familiar with introduction to electronic circuit components, signal and system theory, VLSI design technology and basic CAD flow for electronic system. Duration : The duration of the STTP will be six working days. It will start on Monday 30th January, 2017 at 9:30 AM and will end on Saturday 4th February, 2017. The participants must report to the respective remote centres by 8:00 AM on 30th January, 2017. Venue: 206 remote centers located in different parts of the country. The list of participating remote centers is given along with online application form. Course Objective: Design and implementation methodology of : 1. Analog front end for sensor interface: Instrumentation Amplifier (IA), chopper, Variable Gain Amplifier (VGA). 2. Data converters: SAR & pipelined ADC. 3. Digital VLSI: a) Static MOS gate circuits b) High-Speed CMOS Logic Design c) Transfer Gate and Dynamic Logic Designd) VLSI architectures for video processing. 4. RF circuits: Introduction to RFIC design. 5. Design and implementation of typical RF Tx-Rx sub-components  a) Low Noise Amplifier (LNA) (b) Mixer c) Frequency synthesizer (d) Power amplifier (e) Lay out and chip level integration.Design methodology: From pen-paper design of various mixed signal/RF circuit blocks to schematic level implementation and then sub-sequent physical design, post-layout synthesis and simulation. Eligibility- 1) He/ she must be a faculty member in the Department of Electronics and Communication Engineering / Electrical Engineering /Computer Science and Engineering /Instrumentation Engineering /Information Technology /Physics with basic VLSI knowledge/ Mathematics with basic VLSI knowledge/ Material Science with basic VLSI knowledge/ related Departments and Centres. 2) B.E. / B. Tech. or equivalent degree holders in the above mentioned disciplines with minimum teaching experience of 2 years and moderate teaching experience in the area of Analog and Digital Circuits. 3) M.E / M.Tech. degree holders in the above mentioned disciplines with minimum teaching experience of 1 year and moderate teaching experience in the area of Analog and Digital Circuits. 4) Ph.D. degree holders should have a minimum teaching experience of 1 year and moderate teaching experience in the area of Analog and Digital Circuits. Course Modules 1. Radio Frequency Integrated Circuits (RFIC) : Module-A Fundamental of RFIC design, How RF design alters from traditional analog design. Various commercial protocols, basic Tx-Rx Architecture. Module-B Various performance parameters, Noise. Module-C Design of LNA, VCO, Mixer and frequency synthesizer, Power amplifier, High speed I/O(SERDES), layout of RF circuit design. 2. Mixed Signal Blocks : i)Digital VLSI Design:High-Speed CMOS Logic, Transfer Gate and Dynamic Logic a) Basics of video processing b) VLSI Architectures for video processing ii)Analog Design: Analog front-end electronics (AFE), SAR ADC, Pipelined ADC. Contact- Indian Institute of Technology Kharagpur IIT Kharagpur, Kharagpur, West Bengal 721302 |