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April 9th, 2015, 12:16 PM
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Join Date: Mar 2012
Re: VIT M.Tech Computer Science and Engg entrance Syllabus

Vellore Institute of Technology Master’s entrance examination is an entrance for admission in M.Tech course.

As per your request, I am giving you syllabus of the VIT M.Tech Computer Science and Engg entrance exam syllabus.

Engineering Mathematics

Mathematical Logic:

Syntax of First Order Logic, Semantics of First Order Logic, a Sequent Calculus, the Completeness Theorem, the Limitations of First Order Logic.

Differential and Integral Calculus :

Limit, Continuity, Differentiability, Leibniz theorem, Mean Value Theorems, Taylor’s theorem, Integrals, Improper integrals, Total Differentiation, Partial derivatives ,Maxima and Minima, vector calculus, Linear differential equations.

Probability and Statistics:

probability, conditional probability, Baye’s theorem, means, median, mode, moments, standard deviation. Random variables, Uniform, Binomial, Poisson, normal distributions, Correlation and regression, Sampling and Tests of significance.

Numerical Methods:

solutions to alge braic and transcendental equations(Bisection and Newton Raphsons’ methods), simultaneous linea r alge braic eq uations(Gauss elimination, Crouts, Gauss seidal and relaxation), Inte r p o l at i o n methods (forward , bac k wa rd and central), numerical integration (Trapezoidal, Simpson’s and Wedd le’s) eigen values and eigen vectors, Numerical solutions to ordinary (Euler, modified Euler, Runga Ku tta 4 th order) and partial diffe re ntial ( parabolic, elliptic and Hyperbolic) equations.

Linear Algebra and Transforms:

linear vector space, determinants, matrices, eigen values, eigen vectors, elements of complex analysis, laplace transforms, Fourier analysis.

Theoretical Computer Science

Discrete Mathematics:

sets, relations and functions, algebra of matrices and determinants, algebraic structures, Boolean algebra and applications, order relations and structures, graph theory, logic and combinatorics.

Theory of computation:

Regular languages and finite automata, context free languages and Push down automata, recursively enumerable sets and Turing machines, undecidability.

Analysis of algorithms and computational complexity: Asymptotic analysis ( best , worst, average case) of time and space, Upper and lower bounds on the complexity of specific problems, NP‐completeness, code and query tuning techniques, numerical analysis, power analysis & resiliency, intractable problems.

Computer Hardware

Electronics:

Network analysis, semiconductor devices, bipolar transistors, FET’s, Power supplies, amplifier, Oscillators, Operational amplifiers, elements of digital electronics, logic circuits.

Digital logic:

Number systems and codes, Gates, TTL circuits, Boolean algebra and Karnaugh maps, Arithmetic logic units, Flip flops, registers and counters, Memories, Combinational and sequential logic circuits .

Computer Architecture and organization:

Machine instructions and addressing modes, ALU and data path, Register Transfer Language , hardware and micro programmed control, memory interface, RAM, ROM I/O interface ( Interrupt and DMA modes), serial communication interface, instruction pipelining, Cache , main and secondary memory storage, organization and structure of disk drives, RAID architectures Microprocessors: 8085, 8086, Interfacing and memory addressing.

Software systems

Data structures:

Notion of abstract data types, stack, Queue, List, set, string, Tree, binary search trees, heap, graph.

Programming methodology:

Introduction to programming, pointers, arrays, control structures, Iterational control structures, functions, recursion, testing, debugging, code review, structures, files.

Algorithms for problem solving:

Tree and graph traversal, connected components, spanning trees, shortest paths, hashing, sorting, searching , design parad i g m s (G re ed y, dynam i c programming, divide and conquer).

Programming language processors:

Compiler, Interpreter, assembler, Linker, Loader, Macro processors, phases of compilers, Lexical analysis, parsing, Top‐down parsing and bottom up parsing, syntax directed translation, runtime environment, Symbol table, type checking, intermediate Code generation, Code optimization, code generation.

Operating systems:

Memory management, page faults, overlay, processor management, device management, dead locks, Process, thread and inter process communication, CPU scheduling, file systems, I/O systems, protection and security.

Exam pattern:

Physics 40 questions
Chemistry 40 questions
Mathematics 40questions

Address:
VIT University
Near Katpadi Road, Katpadi, Vellore, Tamil Nadu 632014 ‎
0416 224 3091




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